IC Test Process/ Test Cell Development Manager (Vemagal)

Role Overview: The Test Cell Development/ Test Process Development Manager is responsible for leading the design, optimization, and deployment of wafer probe (wafer sort) and final test processes for NPI projects and release it for high-volume OSAT environment. This role ensures robust Test Cell released with cost efficiency, and seamless integration of test cells into production lines, supporting both NPI (Current Product Introduction) and mass manufacturing. Key Responsibilities Test Cell Development:
- Design and develop test cell configuration, docking/undocking handlers and probers, including hardware change kits for NPI programs production ramp-ups.
- Assist with test floor tool setup, ensure smooth transition from NPI to production by buying off new hardware and clarifying constraints
- Handler and Prober change Kits development and setup and manage teams
- Architect and deploy automated test cells for wafer sort and final test.
- Familiar with all the testers (Advantest (93K), Teradyne Ultra Flex/J750, Eagle ETS, Nextest, Advantest), Handler/Probers Good Knowledge working on Handler (Hon Precision, Delta Matrix), probers (TEL, Accretes) and identifying the Handler Prober for the NPI devices, sockets for the devices, burn-in equipments and process.
- Ensure scalability, repeatability, and robustness of test cell designs.
- Integrate test cells with OSAT production lines, balancing throughput, cost, and reliability.
- Oversee qualification and release of new test platforms and equipment.
- Continuous Improvement
- Suggest DOE/project actions to improve uptime yield
- Collaboration Coordination
- Engage with NPI, planning, engineering, spare-stock teams
- Hands-on troubleshooting skills for handlers, probers, sockets, probe cards, and load boards. Handler Prober Change Kit Management:
- Assist in managing handler docking, qualification of multiple change kits, and maintaining documentation for hardware swaps during ramp-up and product transitions.
- Localize the Change Kits. Continuous Improvement Projects:
- Identify recurring machine faults or inefficiencies and propose improvement projects or DOE initiatives in collaboration with Engineering and NPI teams
- Assist in roll-out of hardware improvements, process standardization, and updates to checklists. Leadership Collaboration:
- Lead cross-functional teams of test engineers, technicians, and operators.
- Train staff on wafer probe and final test methodologies, equipment, and best practices.
- Act as the primary liaison between OSAT customers and internal teams for test-equipments related issues. Test Process Development:
- Define and optimize wafer probe and final test processes for semiconductor devices.
- Collaborate with design, product, and test engineering teams to ensure test coverage, yield, and throughput.
- Drive continuous improvement initiatives using Lean/Six Sigma practices.
- Monitor KPIs such as yield, defect detection rate, cycle time, and equipment utilization.
- Ensure compliance with industry standards (JEDEC, ISO, IPC).
- Support customer audits and technical reviews. Essential Attributes Technical skills:
- Hands-on experience with wafer probe (probers, probe cards) and final test ATE platforms (e.g., Teradyne, Advantest, Cohu, SPEA).
- Strong knowledge of, functional test, parametric test, and Load Board probe card technologies.
- Proficient with data analysis tools (e.g., Python, R, JMP, Minitab) and MES/Test data systems. Process skills:
- Lean, Six Sigma (Green/Black Belt preferred), project management experience. Soft skills:
- Strong leadership, cross-functional collaboration, customer-facing communication, and problem-solving.
- Ability to manage multiple test Cell development projects simultaneously.
- Skilled in Lean/Six Sigma for process optimization.
- Strong documentation and reporting skills.
- Leadership and team management.
- Customer communication and stakeholder management.
- Analytical and problem-solving mindset. Qualifications:
- Bachelors degree in electrical engineering, Electronics, Semiconductor Engineering, or related field; Masters preferred. Desired Experience Level:
- Minimum 8-12 years in semiconductor test engineering within OSAT, IDM, or ATE vendor environments; at least 4 years in a leadership role. Apply on Kit Job: kitjob.in/job/4lwh1c