Core Silicon Design Engineering Roles (Pune)

Building Core Silicon at Lattice Semiconductor (Pune) At Lattice Semiconductor, we’re growing a globally connected engineering organization across San Jose, Pune, Hyderabad, Penang, and Manila—with a simple belief at the core: Global scale doesn’t have to mean distance from decisions. Here, engineers stay close to the work. They own meaningful parts of the silicon. They change things—and make them work—without long approval chains. World‑class semiconductor engineering, with the autonomy and pace usually found only in much smaller teams. Now Hiring in Pune — Core Silicon Design Roles As part of this growth, we’re expanding our custom silicon and circuit design team in Pune, working closely with global architecture and technology teams. Senior Memory Designer – SRAM & Configuration Memory This role focuses on SRAM and configuration memory that sit at the heart of our FPGA devices. You’ll work at the circuit and transistor level, with clear ownership to design, modify, and optimize memory blocks across active and future technology nodes. This is a hands‑on role for engineers who enjoy shaping memory architectures and influencing power–performance decisions early. Ideal if you enjoy: SRAM and configuration memory design Circuit‑level ownership and SPICE‑driven analysis Working in lean teams where technical judgment matters Custom CMOS / Circuit Design Engineer – Transistor‑Level Ownership This role is for engineers who like being close to the schematic and the devices. You’ll design and evolve custom CMOS circuits, with strong awareness of layout, device behavior, and PPA trade‑offs. Memory exposure is a robust plus, and mixed‑signal experience is welcome, but the core focus remains custom digital CMOS and circuit ownership. Ideal if you enjoy: Schematic‑first, transistor‑level design Hands‑on circuit optimization and iteration Freedom to improve designs—not just implement flows ✨ Why These Roles Are Different Pune as a core design hub, not a satellite Strong ownership, minimal hierarchy Early involvement in next‑generation node and PPA exploration A builder‑driven environment where engineers shape outcomes If you’re excited by building silicon, not just maintaining it—and want to do so in a global team that still values ownership and engineering judgment—Lattice Pune is worth a closer look. Apply on Kit Job: kitjob.in/job/4na8y4