ASIC Engineering Physical Design Leader (Pune)

**Meet the Team** Cisco's Client Optics Group (COG) designs & delivers the high-speed optical transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of cutting-edge IM/DD optics and silicon photonic platforms that enable customers to deploy industry-leading optical technologies within data center with unprecedented speed, capacity, and reliability. Come join us and take part in shaping COG's ground-breaking optical solutions by designing, developing, and testing some of the most advanced pluggable, and Co-packaged Optics (CPO) being developed in the industry. You will work with Cisco's outstanding Silicon Photonics team. Our team is responsible for driving the development and optimization of optical transceivers & modules (800G,1.6T & beyond) that seamlessly integrate with Cisco's routing, switching, and datacenter platforms, enabling customers to build scalable, high-performance networks that support emerging technologies including AI/ML workloads, and next-generation data center architectures. We are looking for a talented and experienced ASIC Engineering Physical Design Lead to join our team and drive verification of Cisco's silicon photonics driver integrated circuits for the next generation of products for 100/200/400G per Lambda solutions. **Your Impact** + Own and drive RTL/netlist-to-GDSII implementation for block-level and full-chip designs in advanced technology nodes. + Own and develop digital implementation flows and collaborate closely with EDA tool vendors to debug issues and continuously improve methodology. + Develop and execute hierarchical floor plans, accounting for mixed-signal integration, macro placement, I/O planning, congestion, timing, and power distribution. + Drive place and route, clock tree synthesis (CTS), post-route optimization, and timing closure across multi-mode, multi-corner (MMMC) scenarios. + Perform static timing analysis (STA), analyze timing reports, and implement timing ECOs using tools such as Tempus and Tempus ECO, or equivalent industry-standard tools. + Collaborate with RTL, Analog, DFT, Packaging, CAD, and EDA teams to resolve implementation issues and improve overall design convergence. + Run and debug back-end signoff checks, including power integrity, IR/EM analysis, and physical verification. + Develop automation scripts using TCL, Python, Bash, or Perl for QoR tracking, reporting, and flow efficiency. **Minimum Qualifications** + Bachelor's or master's in electrical engineering or equivalent field + 10+ years of Physical Design experience in ASIC/SoC physical design and implementation in advanced CMOS tech nodes + Proven hands-on experience with the full physical design flow at block and/or chip level PD + Ability to lead a small team of PD engineers & work collaboratively with globally dispersed cross-functional teams + Good understanding of various EDA tools and sign-off criteria and experience in scripting and automation such as Python, Perl, TCL, or Shell Scripts. **Preferred Qualifications** + Hands-on experience in closing designs with high-speed, high-density, macro-dominant, and I/O cell-intensive blocks + Solid knowledge of static timing analysis, timing constraints, and timing ECO implementation + Proven fundamentals in identifying and debugging EM, IR, RC, and glitch-related issues + Hands-on experience with functional equivalence checking and functional ECOs + Experience in power grid design and optimization + Good Understanding of the Standard-Cell IP, memory compiler IP Selection Criteria + Experience in integrating mixed-signal designs **Why Cisco?** At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era
- and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis. Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records. Apply on Kit Job: kitjob.in/job/4n8txg