Asic Design And Verification Engineer (Karnataka)

Key Skills Required:
- Robust expertise in SystemVerilog (SV) and UVM methodology
- Experience in SoC/IP level verification
- Hands-on with AMBA protocols (AXI, AHB)
- Exposure to high-speed interfaces: PCIe, USB, Ethernet, DDR (preferred)
- Experience in testbench development, debugging, and coverage closure
- Knowledge of assertions (SVA), regressions, and verification planning Roles & Responsibilities:
- Develop and execute verification plans for IP/SoC level designs
- Build reusable UVM testbenches and verification environments
- Write test cases, sequences, and assertions (SVA)
- Perform functional and code coverage analysis & closure Apply on Kit Job: kitjob.in/job/4mst0l